7. Cache - iPhone, Android and Desktop
Desktop and Smartphone
The table below shows the typical memory and caches used within a desktop \ laptop CPU. In this case an Intel 4 core CPU.
All cache memory at the end of the day is a set of logic gates, so it is useful to appreciate where those gates actually reside - hence the 'physical location' column.
'Latency' is the number of clock cycles it takes to make a data item available. It starts with the very fast, but smallest Level 1 cache (4 cycles) that is closest to the processing core, then each cache is slower but more remote from the core itself. The table also includes the external RAM which takes about 117 cycles and the really slow virtual memory of the swap file stored on the hard disk.
Memory | Size | Latency | Physical Location |
---|---|---|---|
L1 cache | 32KB | 4 cycles | within each core |
L2 cache | 256KB | 11 cycles | beside each core |
L3 cache | 6 MB | ~ 21 cycles | shared with all cores |
L4 E-cache | 128MB | ~ 58 cycles | separate chip |
RAM | 4GB + | ~ 117 cycles | motherboard ram |
Swap File | 100GB + | ~ 10,000 cycles | hard disk |
Table: Intel Core i*4 arrangement
And mobile phones also use the same idea - this is the memory arrangement of the Apple iPhone 6
Memory | Size | Latency | Physical Location |
---|---|---|---|
L1 cache | 64KB | 4 cycles | inside each core |
L2 cache | 1MB | ~20 cycles | next to the 2 cores |
L3 cache | 4MB | ~ 107 cycles | next to the memory controller |
RAM | 1GB | ~ 261 cycles | external chips |
Table: iPhone 6 memory arrangement
So even though a powerful desktop computer seems to have no relationship to the smartphone in your hand, both are using the same ideas in trying to make the maximum use of their powerful CPU despite the memory bottlenecks in the way.
Challenge see if you can find out one extra fact on this topic that we haven't already told you
Click on this link: Code optimisation with cache
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